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PhilipJ451's avatar
PhilipJ451
Icon for New Contributor rankNew Contributor
4 years ago

Force Quartus to keep a signal for SignalTap to use

Hi, I am hoping someone may have an answer to a problem I have wrestled with for a long time. I make a lot of use of SignalTap to analyze what is going on inside my FPGA design but so often I fin...
MathiasB's avatar
MathiasB
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Hi,

I think it may depend on how you add signals to your Signal Tap.

First you do not need to run the whole compilation, just elaboration is enough (saves a lot of time).

Then when you use the Signal Tap's node finder, select "Signal Tap: pre-synthesis" in the filter options.

Save and do full compilation this time. It should work. At least this is what I do, though I do not think I have unused internal logic to monitor in my designs.

Hope that helps