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Altera_Forum's avatar
Altera_Forum
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10 years ago

Failure to infer array of memories and busses

In a larger project I have a triple-buffer with each buffer made up of 16 individually addressable tiles/slices (word interleaved). Specifically that means 48 true dual-port 4kx20bit memories with...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

This looks similar to an issue I raised with altera about 5yrs ago. The problem was inferring rams in a generate statement (ie it wont work). It's taking a long time because its generating the rams out of registers.

Work around is to make a single ram entity and instantiate it in the generate loop.

Please raise a ticket with altera to get this sorted.