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Altera_Forum's avatar
Altera_Forum
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12 years ago

Error while trying to program EPCS flash in indirect SFL mode

(editing my previous thread for an update and save make the thread becomes blank, so I'm re-posting it as a new thread here)

Hi,

On my new CoreEP4CE10 board, I'm able to upload designs successfully in FPGA

Ram using JTAG, but I'm unable to program EPCS Flash using JTAG Indirect SFL

mode.

Since this board doesn't have an AS connector, I have no other choice to

program using SFL, so I decided to try at command-line, but I got same

problem :

We can see below that SFLoader is actually succesfully loaded, but then the

JTAG hang and the EPCS is not detected.

Question : Are all boards using same FPGA are compatible with those SFL

"Factory default enhanced SFL image" provided ? Should I try to make my own

loader using SFL Megafunctions ?

Info: *******************************************************************

Info: Running Quartus II 64-Bit Programmer

Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition

Info: Copyright (C) 1991-2013 Altera Corporation. All rights reserved.

Info: Your use of Altera Corporation's design tools, logic functions

Info: and other software and tools, and its AMPP partner logic

Info: functions, and any output files from any of the foregoing

Info: (including device programming or simulation files), and any

Info: associated documentation or information are expressly subject

Info: to the terms and conditions of the Altera Program License

Info: Subscription Agreement, Altera MegaCore Function License

Info: Agreement, or other applicable license agreement, including,

Info: without limitation, that your use is for the sole purpose of

Info: programming logic devices manufactured by Altera and sold by

Info: Altera or its authorized distributors. Please refer to the

Info: applicable agreement for further details.

Info: Processing started: Wed Feb 19 12:11:02 2014

Info: Command: quartus_pgm -m JTAG -o pi;output_files/blinker.jic

Info (213045): Using programming cable "USB-Blaster(Altera) [1-1.3]"

Info (213011): Using programming file output_files/blinker.jic with checksum

0x1A5AF94D for device EP4CE10@1

Info (209060): Started Programmer operation at Wed Feb 19 12:11:03 2014

Info (209016): Configuring device index 1

Info (209017): Device 1 contains JTAG ID code 0x020F10DD

Info (209007): Configuration succeeded -- 1 device(s) configured

Error (209037): JTAG Server can't access selected programming hardware

Error (209012): Operation failed

Info (209061): Ended Programmer operation at Wed Feb 19 12:11:26 2014

Error: Quartus II 64-Bit Programmer was unsuccessful. 2 errors, 0 warnings

Error: Peak virtual memory: 286 megabytes

Error: Processing ended: Wed Feb 19 12:11:26 2014

Error: Elapsed time: 00:00:24

Error: Total CPU time (on all processors): 00:00:00

UPDATE :

Following instruction of the Troubleshooting page

(http://www.altera.com/cgi-bin/ts.pl?fn=configuration&hi=2-8), I've manually

uploaded the SFL into the FPGA, then I've performed an antodetect again, and

I'm unable to see the EPCS, I'm only seeing the FPGA itself. Doing the same

at the command-line "jtagconfig" only shows the FPGA where I presume the

EPCS should also appear, but it doesn't ... I've check power supply

voltages, they look fine ... Is that mean my USB Blaster is defective (but

why I'm able to upload FPGA properly) ?

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Is the EPCS device an Altera branded device or from a third party vendor? You may be seeing that error because the FLASH programmer doesn't recognise the ID of the configuration device fitted. There are plenty of vendors manufacturing serial FLASH parts but unless Quartus recognises the device ID it won't program it.

    The way around this is to use the Nios FLASH programmer available from within Eclipse - having programmed your FPGA with a design containing a Nios core. You can set up the Nios FLASH programmer to work with third party devices successfully.

    Is this you're own hardware? Have you ever had the FLASH device working? Is there a build fault?

    Regards,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Hi Alex,

    Although I don't see Altera logo on the chip, it is a EPCS16N. But we never know when things come from China ... The board is a small dev board CoreEP4CE10 from WareShare.

    I don't see any build fault, and originally, there was some test code in the EPCS, a small leds shift register, which as loading properly at power-up.

    Unfortunately, this code probably been partially erased by all my trials...

    BTW, is the EPCS device ID should shows up during a "jtagconfig -n" ? (I'm only seeing the FPGA and the SFL nodes.)

    As mentionned in the other thread, http://www.alteraforum.com/forum/showthread.php?t=44037, I'm thinking that the issue is the USB Blaster clone, since I've about the same behavior with another board, an cheap chinese EP2C5, but which has an AS connector and works fine in that mode. Also, which also lead me to the same conclusion is the fact that each time I wish to reprogram the FPGA with JTAG mode, I've to disconnect the USB and reconnect it, otherwise, even "jtagconfig" won't see it. So, probably that in JTAG Indirect SFL mode, there is some king of reset occuring between to SFL loading and the EPCS programing, but the USB Clone is already hang in the second phase. Do you think my conclusion is right ?

    So, I will have to wait the shipment of my latest order, an USB Blaster based on FTDI+CLPD, hoping it will solve the issue.