Just delete
--altera translate_on
....
--altera translate_off
in the following file!!!!!!!!!!!!!!!!!!!!!!!!!!!!
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE work.de2_io_definitions_pkg.ALL;
USE work.clock_gen_1536k_pkg.clock_n_pulses_record;
PACKAGE tone_finder_top_pkg IS
COMPONENT tone_finder_top IS
PORT (
-- System signal
aclr : IN std_logic;
-- 7-Segment Display
ouv8_hex_display : OUT std_logic_vector(7 DOWNTO 0);
Clock : IN std_logic;
-- Control Signals
iuv18_toggle_switch : IN std_logic_vector(17 DOWNTO 0);
-- Audio Codec Interface
isv16_audio_data : IN std_logic_vector(15 DOWNTO 0);
osv16_tone_data : OUT std_logic_vector(15 DOWNTO 0)
);
END COMPONENT tone_finder_top;
END PACKAGE tone_finder_top_pkg;
-----------------------------------------------------------------------
--altera translate_off
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.NUMERIC_STD.all;
entity tone_finder_top is
port (
aclr : in std_logic;
ouv8_hex_display : out std_logic_vector(7 downto 0);
Clock : in std_logic;
iuv18_toggle_switch : in std_logic_vector(17 downto 0);
isv16_audio_data : in std_logic_vector(15 downto 0);
osv16_tone_data : out std_logic_vector(15 downto 0)
);
end entity tone_finder_top;
architecture rtl of tone_finder_top is
component tone_finder_top_GN7422 is
port (
aclr : in std_logic;
ouv8_hex_display : out std_logic_vector(8-1 downto 0);
Clock : in std_logic;
iuv18_toggle_switch : in std_logic_vector(18-1 downto 0);
isv16_audio_data : in std_logic_vector(16-1 downto 0);
osv16_tone_data : out std_logic_vector(16-1 downto 0)
);
end component tone_finder_top_GN7422;
begin
tone_finder_top_GN7422_0: if true generate
inst_tone_finder_top_GN7422_0: tone_finder_top_GN7422
port map(aclr => aclr, ouv8_hex_display => ouv8_hex_display, Clock => Clock, iuv18_toggle_switch => iuv18_toggle_switch, isv16_audio_data => isv16_audio_data, osv16_tone_data => osv16_tone_data);
end generate;
end architecture rtl;
--altera translate_on