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Altera_Forum
Honored Contributor
15 years agoError reading file
Hi I'm trying to read a text file which is basically many lines of 1s and 0s, e.g. 1 0 1 1 0 At the moment if I include the file I get the following error message when I try to co...
Altera_Forum
Honored Contributor
15 years agowhat "include" statement means that replace the statement from the file.
what you did is compiling just numbers in VerilogHDL. that doesn't make sense. in term of $fopen case. actually verilog-HDL does support $fopen. but QuartusII does not support some case of Verilog rules. how about that prepare file like that //----------------------------------------------- `define MYNUMBER 32'h00FF00FF00FFFFF //----------------------------------------------- and use the definition in your code. //----------------------------------------------- fileID = `MYNUMBER; //----------------------------------------------- does it help for you?