Honored Contributor
Honored ContributorA couple of notes.
1. You may need to do more than I did in order fully test your code. The synthesizer may still be "optimizing" away large portions of your code that don't drive any output. You need to make sure that all relevant outputs of your code are included as outputs of the module. If the signal "K" is dependent in some way on all other signals and processes and that is the final output you want to analyze then the changes I did should be fine. I'm thinking you may need to bring in a clock signal and register some of these processes (especially if number of clock cycles is something you are trying to evaluate) though honestly I haven't actually looked at what you are trying to do here. 2. Depending on the results you get it may still be a good idea to rework your code to a lower level. 3. I chose a mid-grade Cyclone IV device. No particular reason other than I was sure it would easily fit your module.
