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AEsqu's avatar
AEsqu
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3 years ago

Does Quartus 13.1 pro supports Intel-FPGA-Quartus-RSA-1 RTL encrypted code?

Hello,

I've seen in another forum that Quartus pro supports the RTL encrypted with Intel-FPGA-Quartus-RSA-1.

But I have the impression it is only supported by quartus prime and not quartus pro.

The problem is that I use a Stratrix 3 FPGA and cannot use any new version of quartus than 13.1.

Quartus pro 13.1 gives an error at the line 3 of reading the encrypted verilog code which is:

`pragma protect begin_protected
`pragma protect version=1

error:

Critical Warning (10191): Verilog HDL Compiler Directive warning at __defines.vh(2): text macro "pragma" is undefined

Error (10170): Verilog HDL syntax error at __defines.vh(3) near text "protect"; expecting ";"

Later on the file there are references for quartus (are they understood by quartus prime?):

`pragma protect key_keyowner="Intel Corporation"
`pragma protect key_keyname="Intel-FPGA-Quartus-RSA-1"
`pragma protect key_method="rsa"
`pragma protect encoding = (enctype = "base64", line_length = 76, bytes = 256 )
`pragma protect key_block
n0UPGPFspR1ysbje0ATJO017usMhu6rHITQH+dT3Twom+D...

I was planning to use Synplify to create the gate netlist but the output is encrypted in the vqm,

which also gives error with quartus.

Alex.

3 Replies

  • AEsqu's avatar
    AEsqu
    Icon for Contributor rankContributor

    Apparently the support was introduced at Quartus Pro 17.1,

    can you confirm?

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