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xiaobai1's avatar
xiaobai1
Icon for New Contributor rankNew Contributor
4 years ago

Development board outputs clock signal

I have encountered some problems in the process of learning. I sincerely hope you can spare time to guide me. Objective: To obtain 50MHz clock signal by using CycloneV (5CGTFD9E5F35) to output o...
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
4 years ago

Hello
according to the photo, the OP is connecting J14 (SMA_OUT) to the oscilloscope, it is in fact driven by FPGA pin AF33. Not sure why the configuration doesn't work.

Frank