DE1 Reading / Writing to SRAM

A quick glance tells me your code will work, at least partially, although note that the "read" case in your code takes two clock cycles - one to set the address, and the second to read valid data, since the RAM will have a delay, and you won't end up reading the data result available on SRAM_DQ until the next cycle.

I'm worried about the commnds at the top though. Those two lines of code are executed on rising and falling edges of the clock, and in some cases could mean you write data to the wrong address! (when write goes high, but the address isn't set yet...)

Incase you're not sure, those two commands (the OE and WE ones) are executed on the rising AND falling edges of the clock, which probably isn't what you intended...