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Ryan-SEU's avatar
Ryan-SEU
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3 years ago

DDR3 cannot read data when burst length larger than 8, Maximum Avalon-MM burst length set as 1024

Hi everyone, my work Environment : WIN10 64bits, Quartus II 18.1, modelsim-altera 10.5b, cyclone V E 5CEFA9F31I7N, Micron MT41J128M16JT-125*2. Q1: I configured the Maximum Avalon-MM burst lengt...
AdzimZM_Altera's avatar
AdzimZM_Altera
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3 years ago

Hi Ryan,


Q1: If my understanding is right, it is referring to the width.

Also your memory has a Fixed burst length of 8 and burst chop of 4.


Q2: You use chip select of 2.


Regards,

Adzim


  • Ryan-SEU's avatar
    Ryan-SEU
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hi Adzim,

    Q1: Thanks for your reply！what width do you mean？The data bit width of avalon has been set to 128bit.

    Regards,

    Ryan