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CAlex's avatar
CAlex
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2 years ago

CycloneVsoc dev kit UART read from FPGA/HPS

Hi, My hardware is Cyclone V soc Dev kit with software of newest version of GHRD. I encountered several questions on handling the UART. 1. According to the GHRD QSYS HPS Mux Table: UART RX...
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi


Do you have any new updates for this case?


Regards

Jingyang, Teh


CAlex's avatar
CAlex
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2 years ago

We bought a module to set the SPIM as the Uart, I now finished the host program to read that.

And the FPGA side I loan the HPS IO to the FPGA and they communicated with each other successfully.

But SOC(HPS) side there are two issues:

1. how to let HPS send the data to a RAM(an FPGA IP along with the GHRD).

2. how to let uart receive the data from that IP.

Reguards