Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi Cris,
thanks a lot for the reply. A couple more questions if you don't mind please? . . . . . . The counter allows me to pick of a number of sub-divided clocks, i.e., 32 --> 16, 8, 4, 2, 1 MHz Do I need a generated clock for each, or just the counter itself? clk is the name of the pin connected to the external 32MHz oscillator, its entry in the .SDC file is create_clock -name clk -period 31.25 [get_ports clk] the counter block is lpm_counter0 with an instance name of clock/2 the lpm_counter parameters are q[4..0], can you tell me the exact syntax to enter, e.g., assuming that I need a generated clock for each . . . . create_generated_clock -name <something> -source clk -divide_by 2 -duty_cycle 50.00 <what do I enter here to specify the counter port> create_generated_clock -name <something_else> -source clk -divide_by 4 -duty_cycle 50.00 <what do I enter here to specify the counter port> etc. regards Dave