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Altera_Forum
Honored Contributor
12 years agoseed_EN is juist a wire connecting the seed_EN_out ports of the two entites. It would be declared as an internal signal in the design file that instantiates the two entites.
seed_EN is juist a wire connecting the seed_EN_out ports of the two entites. It would be declared as an internal signal in the design file that instantiates the two entites.