Try using non-blocking reads and/or writes to the channel to avoid deadlock. In one of my designs I use a non-blocking read inside a do-while loop which effectively polls the channel until something is received:
bool got_val;
do{
read_val = read_channel_nb_altera(accum, &got_val);
}while(!got_val);
note, replace 'altera' with 'intel' if you are using sdk version > 16.0 Take a look at the fpga opencl sdk programming guide (
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/opencl-sdk/aocl_programming_guide.pdf#page=33) (take a look at pages 33-35 for channel reads/writes)