Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYou may want to take a look at myhdl (http://www.myhdl.org/doku.php/start)
It uses Python as the descriptive language and converts either to Verilog or VHDL.You may want to take a look at myhdl (http://www.myhdl.org/doku.php/start)
It uses Python as the descriptive language and converts either to Verilog or VHDL.