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Altera_Forum
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14 years ago

Automatic VHDL Code Generation Programmatically

We are actually working on a Double Precision IIR filter. We are interested in making a very generic filter which could support variety of functionalities. For some reason, VHDL generics are not supe...
Altera_Forum's avatar
Altera_Forum
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14 years ago

The problem is, FPGA designs tend to get quite tight with resources. generated code often produces designs that use a lot more resources than would be the case with something that was hand coded. So you can see the friction here.

Mathwoks offer HDL coder that generates generic HDL from simulink designs, but its a bit limited in what it can do. But it can all the things you're asking for.