Wow it works so much better now! I can change to a different device/add or remove output ports and it all still works. The code didn't even really change that much except for the clock divider and registering those inputs.
Something else I thought of, when I actually hook this up to hardware I'm going to have to 25 MHz clocks (one from the phy board, one from the fpga). The code I wrote relies on the fact that they are at the same speed so that the data I'm supplying is in line with the data I'm receiving. Could I use a FIFO as a buffer for the data and just pump it in at one clock speed (the phy board clock speed) and read it at another speed ( the fpga clock speed) and then as long as the fifo is long enough, I shouldn't have to worry about the clocks violating some setup time?