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originally posted by dolphin@Aug 30 2005, 08:39 AM
in my program this is not the case, i only have one function that should be executed in fpga internal ram. --- Quote End ---
Have you tried using FPGA internal ROM instead?
When you build code or data to be stored in FPGA internal memory, the Nios II IDE will generate ".hex" files with the contents of those internal memories. Then you have to recompile the FPGA to link those memory contents to the FPGA bit image. Unfortunately, some FPGA internal memories (MRAM blocks come to mind) can't be initialized from the FPGA bit pattern this way (FYI, M512 and M4K blocks can be initialized from the bit pattern).
If you set your Quartus project to "Smart Recompile", and you recompile the chip with new .hex files without changing the actual logic of the design, it will skip synthesis and fitting and just relink the .hex file data. This can save you a bunch of time.
I've got a project which uses a Nios II/e with 2K internal ROM and 512 bytes internal RAM on a EP1C3. It works fine; the CPU boots and runs from the ROM and uses the RAM for stack and globals. Granted, I had to use all the footprint-reducing tricks in the book, and there's still some dead code (_mulsi3) in there.
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