Forum Discussion
Altera_Forum
Honored Contributor
14 years agoHello Chris72
Yes, i know, that SOPC Builder will generate the system even if this warning is present. I'am working with this design and its running without problems. And i know too, the reason to reduce or simplify the address decoder logic. But i think this warning is a software bug from SOPC builder. The Nios II address range is 0x00000000 - 0xffffffff (32 bit) i have a 64 MByte SDR-Memory at 0x08000000 to 0x0fffffff ( 128 MByte ). Data Master and Instruction Master is connected to this memory. The warning says, "Generating non-optimal logic for tightly_coupled_data_master_0 due to memory map overlap with data_master (0xffffffff - 0x0c101fff)" Non optimal is ok. The Address for the TCD-Master in my design is 0x01011000. This could be optimized. But i don't understand the overlap. If this warning is real there must be an address overlap from 0x0c101fff to 0x0fffffff with the SDR-Memory. If this overlap is real, SOPC Builder has to generate an error. Is that right ?