Forum Discussion
Altera_Forum
Honored Contributor
13 years agoOk so unfourtunatly I got a bit lost again.
The plan is to instance the RAM in the SOPC builder or as a megafunction in quartus? Currently I'm trying to understand how the second option would work, if I understood correctly I would implement a Dual-port ram(from the altsyncram megafunction) and from the side of the A-port(from the SOPC system) I would have a 32 bit bus and from the B-port(FSM) I would have a 2000 bit bus. Since I'm new to this I also don't understand how to serialize the output from the SOPC,does the 2000 char table in the nios ii automatically serialize if there is only 32 bits output aviable, or do I have to manually divide the input 2000 char coefficients into 32 bit words diffrent with RAM adresses(so ~62,5 different adresses). Finally, how to connect the SOPC system with the RAM in the first place(PIO?).I attached a simple image to describe how I understood the idea correctly, thanks for any advice you can give. Fred