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Altera_Forum
Honored Contributor
20 years agoMake sure that you have the Unused Pins for your Quartus project set to be Inputs Tristated. You can do this as follows after the project is opened in Quartus:
1. Click on Assign --> Device 2. Click on the Device and Pin Options Button 3. Click on the Unused Pins Tab. 4. This should be the first Radio button. Just to elaborate on why this is: A feature of the Nios development boards is to demonstrate remote reconfiguration. This is done via an FPGA I/O which is connected to the MAX CPLD on the board. The MAX CPLD is programmed to re-configure the FPGA when the signal is driven low (in this way, the FPGA can send a signal telling the MAX chip to reconfigure itself). For reference designs that include this pin and leave it high, or tri-stated, there is no issue. However, a user design must either drive this pin high manually, tri-state the pin manually, or leave the pin un-assigned and tri-state the unused outputs (as Subroto's instructions indicate).