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Altera_Forum
Honored Contributor
14 years agoFound the issue (obvious in hindsight):
The exception vector hardcoded in the NIOS core was pointing to the EPCS Flash memory, because I was thinking that for each exception, I wanted to restart the processor. However, since interrupts are handled as exceptions through the internal interrupt controller, I was jumping to an address in the EPCS and hanging. Once I changed the exception vector to be the 0x20 offset into my main instruction memory, my problem went away, since the correct ISR was being called.