Here is some related info. I was trying to test the hardware and could not get consistent results pass once fail the next then pass, faile ...
The gentleman that had developed the FPGA code had some test code. Nothing fancy no interrupts just delays and reading the RAMs to see that the hardware was behaving properly.
I took his test function and added it to my code. It worked. So I set about trying to break his basic code of loops and delays to be sure it was not a code issue at my end.
What I found was that if I added a short delay before I checked the hardware I was fine. I medium delay did not read properly, but a long delay worked. According to the FPGA guy a delay should not have mattered.
Final catch is that I was still not breaking his version of the test code even with the medium delay. I finally removed an unused variable in his function (int i[0x3FFFF]) and broke his code.
I have a feeling this will be a 'duh' moment. So any idea will be helpful. WHAT WOULD YOU EXAMINE NEXT?
Thanks for your help!