Forum Discussion
hii when i compile this project i get errors due to licince issues how can i solve it ?
Hello
Nios II is EOL, Altera stop selling Nios II/f license.
New users need to migrate to Nios V and apply the Nios V license.
Regarding the example design, couple of points below that can help you.
To simplify the design, it can be divided into three function blocks:
- RSU block (Dual Configuration IP to handle RSU)
- UART block (Communication thru UART)
- Booting block (Nios to boot from QSPI)
RSU block (Dual Configuration IP to handle RSU)
UART block (Communication thru UART, such as printf & scanf)
Booting block (Nios booting from QSPI)
Below User Guides will help you to understand more about these function blocks.
RSU block (Dual Configuration IP to handle RSU)
- MAX® 10 FPGA Configuration User Guide (How does Dual Configuration IP handle Max 10 RSU?)
- MAX® 10 User Flash Memory User Guide (Dual Configuration IP switches the target CFM only, you will need On-Chip Flash IP to change the FPGA Image in CFM)
UART block (Communication thru UART)
- UART Core (Altera HAL driver to send/receive UART data in Software Programming Model subchapter)
Booting block (Nios booting from QSPI)
- Nios® II Processor Booting from QSPI Flash (QSPI Controller + OCRAM is a must to boot Nios II from QSPI)
- Nios® V Processor Booting from General Purpose QSPI Flash (QSPI Controller + OCRAM is a must to boot Nios V from QSPI)
And finally connecting the 3 logic blocks to get the whole design,
Thanks