Altera_Forum
Honored Contributor
15 years agoM9K Resource in SOPCB
Hi,
Can anyone tell me how does the Fitter allocate the total M9K resource for onchip memory in SOPC Builder? I would like to optimize my M9K resource. Thanks CarideeHi,
Can anyone tell me how does the Fitter allocate the total M9K resource for onchip memory in SOPC Builder? I would like to optimize my M9K resource. Thanks CarideeAny memory block has to be made up of entire M9K blocks - even though the system build will show the actual memory cells used (not overly useful).
The one exception is that is will use the second port to let two users share the same M9K block - provided the access modes allow it. The NiosII cpu uses M9K memory for the registers, this takes an etire M9K block (does it need 4 M9K blocks??) even though only 32*32 = 1024 bits are actually used. I suspect that the alternate register sets (recently added for interrupts) use the same M9K block (by setting higher address bits).Thanks dsl. I have a problem in understanding the Fitter result. Below describes my problem:-
result from quartus ii compilation:- On-chip ram 1 – 27648 bytes M9K Usage after Compilation - 32 M9K On-chip ram 2 – 10200 bytes M9K Usage after Compilation – 10 M9K As far as I’m concerned, only power of 2 values of memory size are meaningful. Hence for on-chip ram 1, instead of 27648 bytes, 32768 (2^15) will be used. It makes sense that 32 M9Ks will be used according to 32 x (32-bit-wide x 256-word-deep) However, for on-chop ram 2, could you please explain why Quartus II Fitter ends up with using only 10 M9K? I suppose it’s using 16 M9K because 16384 bytes (2^14) will be used instead of 10200 bytes. If I further increase the memory size for on-chip ram 2 from 10200 bytes to 10500 bytes, the M9K usage for both on-chip ram 1 and on-chip ram 2 in Fitter report change even though I did not change the memory size for on-chip ram 1. Here is the result:- On-chip ram 1 – 27648 bytes M9K Usage after Compilation – 28 M9K On-chip ram 2 – 10500 bytes M9K Usage after Compilation – 12 M9K I have difficulty in understanding the behavior as to how the on-chip memory is forced into block size that maps well to 1k address depth increment for RAM performance optimization purpose. Thanks, CaridThe memory array need not be complete.
Your 27k block can easily be made of seven 32bit x 1k blocks (28 M9K blocks). Since a single M9K can be be configured as 256 32bit words (or 36bit) it is also (probably) possible) to only use 27 M9K blocks - but with additional logic. My guess is that a full 32k bytes uses less logic and 28k. When you increase the second memory area over 10k, the additional pressure on M9K blocks changes the way the first block is allocated.Thanks dsl. That being said, there is no standard calculation to actually know how many M9K is used, isn't it? If so, how can we optimize the M9K blocks usage?
Thanks, Carid