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My recommendations:
1) Static data - If you plan on pre-initalizing the memory so that it is ready to go after the device is configured then I would use the Qsys on-chip RAM component and make sure the memory initialization feature is on. I typically change the initialization file name from the default when I parameterize the on-chip memory component. Unfortunately that component doesn't support the .mif file format which is much easier to work with using text editors or spreadsheets (if you generate data in a spreadsheet for example) but Quartus can convert between the file formats if I remember correctly. Either way, Quartus has an initialization editor that you can use which provides a graphical interface to type in values or copy and paste.
2) Dynamic data - If you want to re-use the same hardware and change the contents of the memory (much faster than recompiling the hardware with new contents) they you can use the same on-chip memory component in Qsys and just update it dynamically. You can enable the in-system memory editor feature of the on-chip RAM and use the in-system memory editor tool to update the RAM contents dynamically. Alternatively you could connect the JTAG to Avalon bridge to this memory and use System Console to repopulate the RAM with new contents.
So there are many ways to accomplish memory initialization. If you pick a method we can give you more advice on how to use it. I personally think the dynamic updating would be a better approach since you plan on having Nios II updating the memory as an end goal.
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Eventually I will write a NIOS II program which reads from an SPI FLASH and populates the dedicated on-chip memory. The on-chip memory is configured in Dual port mode, the 2nd interface is exported outside NIOS II in order to be accessible via my custom FPGA logic. I recall that in-system memory editor does not support that configuration.
Btw, The data I am providing to the custom fpga logic is the feedforward-solution of a control problem. So basically I am updating a LUT, stored in the on-chip memory.
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