Interfacing with narrower width of slave

In your Nios bsp project, check out

HAL/inc/io.h

/* Dynamic bus access functions */
 
 
#define
__IO_CALC_ADDRESS_DYNAMIC(BASE, OFFSET) \
 
((void *)(((alt_u8*)BASE) + (OFFSET)))
 
 
 
#define
 
 
IORD_32DIRECT(BASE, OFFSET) \
 
__builtin_ldwio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)))
 
#define
 
 
 
 
IORD_16DIRECT(BASE, OFFSET) \
 
__builtin_ldhuio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)))
 
#define
 
 
 
 
IORD_8DIRECT(BASE, OFFSET) \
 
__builtin_ldbuio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)))
 
 
 
#define
 
 
IOWR_32DIRECT(BASE, OFFSET, DATA) \
 
__builtin_stwio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)), (DATA))
 
#define
 
 
 
 
IOWR_16DIRECT(BASE, OFFSET, DATA) \
 
__builtin_sthio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)), (DATA))
 
#define
 
 
 
 
IOWR_8DIRECT(BASE, OFFSET, DATA) \
 
__builtin_stbio (__IO_CALC_ADDRESS_DYNAMIC ((BASE), (OFFSET)), (DATA))
 
 
 
/* Native bus access functions */
 
 
 
#define
 
 
__IO_CALC_ADDRESS_NATIVE(BASE, REGNUM) \
 
((void *)(((alt_u8*)BASE) + ((REGNUM) * (SYSTEM_BUS_WIDTH/8))))
 
 
 
#define
 
 
IORD(BASE, REGNUM) \
 
__builtin_ldwio (__IO_CALC_ADDRESS_NATIVE ((BASE), (REGNUM)))
 
#define
 
 
 
 
IOWR(BASE, REGNUM, DATA) \
 
__builtin_stwio (__IO_CALC_ADDRESS_NATIVE ((BASE), (REGNUM)), (DATA))
 

I think the "16" macros variants eliminate double reads and writes to a 16 bit slave. Like dsl said, you will still need to use byteeanble signals to control byte-wide writes (if you want to use IOWR_8DIRECT).

I also think that IOWR_32DIRECT will actually give you two writes to a 16 bit slave, with the two byteenables ALWAYS asserted. That just makes more sense to me.