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Altera_Forum
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16 years ago

How to read and write value in two different systems?

Dear everyone, I am now working on a multicore system. cpu_0 runs uclinux, cpu_1 runs a piece of program, the base address of led_red( pio ) in the SOPCBuilder is 0x00400000, the base ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thank you for your instruction.

Maybe I could use a more mediate way.

the onchip memory (32 bit ) stores the flag,

and the sram( 512kb ) stores the data wanna be communicated.

onchip memory's accessibility is arbitrated by avalon bridge.

sram's accessibility is arbitrated by flag status.

What about this idea?

By the way,is there anything do with the cache? Should I notice the effect of cache flushing?