Honored Contributor
Honored Contributor<div class='quotetop'>QUOTE (mschnell @ Aug 11 2009, 01:36 AM) <{post_snapback}> (index.php?act=findpost&pid=23473)</div>
--- Quote Start --- As already said in the other thread, I don't suppose it's a good idea to access anything (in fact especially memory) from both CPUs via the same Avalon bus. Moreover I don't think it's a good idea to (in Linux) access anything from userland software using the "0x80000000 + hardware_address". There are decent (portable) means provided to do this (e.g. using "uio" from user land or better doing a decent Kernel driver) and using the correct (portable) macros provided to avoid caching. But of course for testing purpose you can happily ignore these suggestions. You do know that (only with a non-MMU-NIOS2-system) setting bit 31 means "don't cache" ?!?!?!? Thus in your test you might try to use the "0x80000000 + hardware_address" notation with your second CPU as well, if same is a NIOS2 without MMU and with data-Cache. -Michael[/b] --- Quote End --- Thank you for your reply. It's staying at a primary stage, so the simple thing is only for testing. I have tried the "0x80000000 + hardware_address" in NIOSII IDE program, but the result is always -1. I suppose whether the reason lies in the led hardware. led light doesn't store value, once it lights on, the value disappears. Or another reason may be using the led_red[17..0] is out of the variable range. And I have found a reference in nioswiki: http://nioswiki.com/accessing_hardware_reg..._space_programs (http://nioswiki.com/accessing_hardware_registers_from_user_space_programs) Will it help?I am quite new to it, hoping to hear from your instruction.
