How to increase DMA fifo depth?

Hey BadOmen,

No, I'm responding to the external fifo's IRQ in plenty of time. In fact the fifo's level never even makes it to 481, before my ISR starts the empyting process.

However, inside of the DMA object there is a tiny fifo to handle Avalon delays, etc. *This* fifo is the one over-flowing.

If I can get this internal fifo raised this will be pretty nice, as the DMA is emptying the fifo at a rate of 1 word per 2 cpu clocks (at 75MHz). I may be able to increase it to 1 word per 1 cpu clock, but not until I give the DMA some more room.

Ken