Honored Contributor
Honored ContributorHi,
sorry that it take me so long for replying. I was on vacation......:) Meanwhile our hardware engineer (responsible for the hardware designs) created (us software engineers) a running design. So now, we can download software with NIOS 10.0 eds using the hardware design mentioned in previous posts. Why does the design works now: 1.) The not running hardware design was compiled with Quartus 8.1 (as mentioned above). Why that??? Answer: The reason for that is located by the new Quartus 10.0, which is not able to cope with dual-purpose-IOs yet and therefore is not able to compile such a design successfully. (NOTE: ALTERA is already aware of that and they are working on the problem.) 2.) Our hardware engineer recently uses a workaround in order to compile the dual-purpose-IOs with the Quartus 10.0. This works fine. Using the newly created hardware image (Quartus 10.0) we are able to download software to our test board. Our dual-purpose-IOs are used for the FLASH. @AjeeshAzeez: Correct. Flash is located at this address. Don't need to look up max write time, because it's running now. But thanks for helping. @crayner: Yeah, same error message as ours. Is your flash located at this region? In our case it was. Which Quartus Version was used for compiling? Have you also dual-purpose-IOs in your design?
