Does the Nois ii processor support DVFS(dynamic frequency and voltage scaling)?

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Thanks for the reply, I ll look into your paper and ask more if required,

Can you tell me if I can control the PLLs on my DE2 board( Cyclone II FPGA) through software to switch between different frequencies. If yes, how can I measure the switch-over delay ( Time it takes to switch from a frequency to other) and meanwhile to keep the state of the processor harmless, we need to stall the CPU ?

I have Implemented already an H.263 encoder on a NIOS ii based system and now I want to invlove these frequency switchings and check the performance variations between the Implementation (without DFS) and with DFS. I am also interested in Power Consumption measurements of the NIOS ii based systems. I have never done any power consumption measurements before.

SO i look forward to suggestions from your side for up mentioned work. Some ideas to set my action plan further. I think we cant switch between different voltage? Is there FPGA device by ALTERA supporting voltage switching of designed circuits??

Thank you very much.

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Hi,

I do not know your board. But my previous work works on my board(NEEK with CYClONE III).

When I did the research , I remember there is an IP in the tool (called clock reconfiguaration or something else). You can use it together with PLL in the Quartus tools to change the frequency safely. It can be controlled by processor's IO pins which can be set in your software. Then the output can feed the clock pin of the processor.But I did notice the delay was big. So I used my own way(Please check my paper). Yes, definitely you need to concern about the glitch problem during transition.

For the voltage part, I am not sure. I do not know any board supporting voltage change.

For the power measurement, I didn't measure the power before. I think maybe there are jumpers you can use or maybe you can just measure the current of the board's power supply. But I assume you will not see much power savings because:(1)You can not scale voltage;(2)FPGA is not that power intensive compared to real processor or ASIC;(3) Softcore processor's power might be a small part of the whole board's power.