Configuring Altera FPGAs

I am currently working on a project using a cyclone ii device and I am not sure I understood the Configuration Cycle Waveform as described in ALTERAs config_handbook.pdf correctly : (Figure 1-1)

When the system powers up, the Low-to-High transition of CONF_DONE indicates the end of the configuration phase.

Then registers and I/O-pins are initialized before the devices enters the User-Mode, indicated by a Low-to-High transition of INIT_DONE.

My question is :

In VERILOG-1995 registers can be initialized using an INITIAL block.

My code consists of a large number of modules each of them using an INITIAL block.

Are all registers affected by that command initialized during that initialization phase as mentioned above (between CONF_DONE transition and INIT_DONE transition) ?

I am using QUARTUS 9.1SP2 software.

Thanks.