Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

CIII/EPCS design configures and programs but does not start

Hi, I have a design with EP3C40 and EPCS64. I create flash files with: sof2flash --epcs --compress --input=logic.sof --output=logic.srec elf2flash --epcs --after=logic.srec --input=softwar...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi,

Thanks for the reply. Our steps are basically the same and I get the same with yours. Same also with the flash programmer GUI in the IDE.

I double checked that the FPGA is configuring properly from the EPCS device and it does (clocks and test points all come up as expected).

I also read back the contents of the ROM in the EPCS SOPC component to verify that it's the same as the ciii boot loader in nios2eds/components/altera_nios2/boot_loader_epcs_sii_siii_ciii.srec. It matches byte for byte. It's like the call at the end of the boot loader isn't calling the correct address.

Can you tell me what your reset and exception addresses are in your NIOS CPU? My reset address points to the EPCS so that it starts at the boot loader, which seems the correct thing to do.

Mark.