can't boot from epcs to external sram

the main difference is that if destination memory is onchip every thing works, if the destination is offchip it wount work, am i right ?

the epcs memory is accessed as byte memory 8bit, your external memory is 16bit and the byte enable is always enabled. i have looked into the epcs boot memory code and it seems the copy routine does copy byte by byte and therefore with enabled 16bit access the destination memory gets some kind of overwritten / corrupted.

epcs_copy_loop:
    // Wait until an RX-character is available
    ldwio   rf_temp, EPCS_STATUS_OFFSET (r_epcs_base_address)
    andi    rf_temp, rf_temp, EPCS_STATUS_RRDY_MASK
    beq     rf_temp, r_zero, epcs_copy_loop
    // grab the RX-character, and immediately ask for another one
    //   no need to wait for TX ready, if RX is ready, then TX is too
    ldwio   rf_temp, EPCS_RXDATA_OFFSET (r_epcs_base_address)
    stwio   r_zero, EPCS_TXDATA_OFFSET (r_epcs_base_address)
    // store the character we retrieved, and update the destination ptr
    stbio   rf_temp, 0(r_dest)
    addi    r_dest, r_dest, 1
    // loop until the destination == the ending address
    bne     r_dest, r_dest_end, epcs_copy_loop

the stbio is the command that stores the date byte by byte.

i guess you need to attach the byteenables to your design and not tie them to always enabled.