Accessing memory in user logic

Historically Avalon addresses from a master have always been byte addresses aligned to whatever the width of the master is. Slaves on the other hand used word addresses where each address represents a byte, 2 bytes, 4 bytes, etc... depending on the width of the slave port. In the new Avalon spec which Qsys relies on you can use word or byte addressing for masters and slaves so it is a bit more flexible.

At the end of the day if you use the direct macros and always use byte address offsets (with the appropriate alignment) then you should have consistent accesses to the memory space and not have to worry about what the underlining hardware is doing.

To access two bytes at the beginning of a slave base address you would use something like IOWR_16DIRECT(base, 0, data). To access the next two bytes you would use IOWR_16DIRECT(base, 2, data). I believe you are getting confused by bits and bytes, forget about the bits, the only thing they impact is the alignment you need to use. 8, 16, and 32-bit data requires 1, 2, and 4 byte alignment.