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Altera_Forum
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13 years ago

A big bug?

Hi, Here is a simple program:# include <stdio.h># include <io.h># include "sys/alt_stdio.h"# include "alt_types.h"# include "system.h" alt_u8 SND[1100]; int main() { int i; ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Supporting misaligned transfers isn't as easy as it might seem.

At first sight it might be thought adequate to perform 2 bus cycles with appropriate byte enabled and shifted data. This in itself is a moderate amount of logic - especially if you don't want to slow down the processor.

The real issues arise when you get a memory error on the second cycle (eg a mmu 'page not present', or a TLB miss). This really requires a mid-instruction fault! For atomic 'compare and swap' type instructions it is all horrid and really not worth thinking about.