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Altera_Forum
Honored Contributor
Honored ContributorNCO Simulation help
Hello, I am new to FPGA/VHDL and I am trying to generate a sine wave using the Altera NCO IP Core. I have instantiated the IP component and I am using the test bench generated. When I try and s...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Thanks for your response. I am simulating by setting the test bench file in Alteras simulation settings and then clicking Tools -> Run Simulation Tool -> RTL simulation. This prompts modelsim and then I get the following errors: https://www.alteraforum.com/forum/attachment.php?attachmentid=14621 I have not encountered using TCL scripts to simulate as of yet... Kind regards --- Quote End --- Hi, 1.While generating system(NCO), have you enable simulation? So that you can use scrip for loading the libraries which is easy to do. Refer the doc for steps: Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
