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Altera_Forum
Honored Contributor
Honored ContributorBurst size and burst length Avalon MM bridge
Hi, I am using the avalon memory mapped bridge to interface the FPGA with an external DDR2 chip. The naming conventions are a little confusing to me. In the DDR2 SDRAM controller uniP...
Altera_ForumHonored Contributor
Honored ContributorYes, they are the same.
In DDR2, the port name is avl_size which have the same meaning like burst size in Avalon MM pipeline. (This message was posted on behalf of Intel Corporation)
