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Altera_Forum
Honored Contributor
14 years agowill add a module or IP change the performance? (combining SDI and SGDMA)
Hi all I'm wondering whether adding a module or an IP to an FPGA design can change the performance. From what I know, I guess the performance would be changed because different place and rout...
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- (SDI Rx-->CVI-->(some avalon-st adapter and DC FIFO)-->SGDMA) --- Quote End --- Hello, YUFU0511! What are You using as "some avalon-st adapter and DC FIFO" to connect CVI and SGDMA?