Altera_Forum
Honored Contributor
Honored Contributorwhy the module is synthesized away?
hello, i got a problem, here is the my code : attachment 1 and part of the top module is below: attachment 2
Forum Discussion
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- A design entity is removed in synthesis, if no output pin depends directly or indirectly on it's operation or if it has constant output. Cause the design is incomplete, I'm unable to see, what is the reason here. I guess, that all output data from the said module gets lost in other parts of the design, that are missing in the posted code. But it can be usually determined from synthesis warnings. --- Quote End --- thank you, i think its the point, according to you suggestion, i will check my design and make sure if this is the point of the problem.thanks again.
