Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorWhy is Altera force-feeding us with Verilog?
Altera definitely (?) is using Verilog (and System Verilog) to build their latest IP. That's fine by me, after all it is IP and most users don't want to see the internals anyway. But the accompan...
Altera_ForumHonored Contributor
Honored ContributorGenerated code, from just about anywhere, is pretty poor. I am a bit dissapointed with non-standard VHDL though. It was probably provided by an external contractor (as I think they produce most of the IP).
How about raising a support request? You wont achieve alot ranting about it on this forum.
