Forum Discussion
MinzhiWang
Occasional Contributor
Occasional ContributorWhat's the internal tS and tH value of the resister inside FPGA?
Hello Guys, We have one application to detect pulse or its rising edge. So two FFs are used to implement this function. The function diagram as following. We have to know the register's tS and tH pa...
TingJiangT_Intel
Contributor
ContributorI think your main problem is what's the max frequency your design can run at. You can use Timing Analyzer, click the "Report Fmax Summary", and refer to this report.
Also you can check the device datasheet to see the clock tree performance, like cyclone 10:
