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Altera_Forum
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14 years ago

What is the processing speed limitation of Cyclone IV E with speed grade C7?

Hi everyone, Does anyone know, what is the maximum processing speed of Cyclone IV E (with speed grade of C7) within the FPGA fabric? Knowing that PLL on Cyclone IV E can generate up to 1....
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Altera_Forum
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14 years ago

Hi Dave,

The LVDS output from the ADC (TI's AFE5808) i am trying to receive, runs at 910 Mbps, and i am trying to deserialize the serial data from LVDS using DE2-115.

Since i know the speed limitation of DE2-115 (for HSMC) is 740MHz, so i am trying to multiplex the LVDS into 2 HSMC port. But i am not sure if this will work.

Any advice?

Regards,

Michael