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Altera_Forum
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15 years ago

weird dma transfer behavoir

have set up a simple hardware system where the nios writes data to a on-chip fifo, and a dma transfer it back to sdram. datawidth is 32 all the way. i also use rxchan_ioctl to set dma to 32 bit ...
Altera_Forum's avatar
Altera_Forum
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15 years ago

Off the top of my head I'm not sure (I typically access the DMA registers directly.... and I haven't used that DMA in years). I would take a look at this document since the HAL portions of the DMA are documented in there: http://www.altera.com/literature/hb/nios2/n2sw_nii5v2.pdf Also I would use the macros in the DMA driver to read back the status register, you may see a bit in there that might explain what happened.