Voltage level problem on a pin which is a clock

Hi all,

I create this thread because I have a debug problem.

On my PCB, my FPGA (EP3C5E144C8N) has to generate a clock to a PHY chip (Marvell 88E1111).

With my scope, I can see this clock at 125MHz as expected but the '0' is 800mV and the '1' is 1.6V, rather than the 0v and 2.5V expected. The voltage level I saw on the scope doesn't respond to the spec (threshold for detection of a '0' or '1') of the PHY chip, so I can't establish communication between my system and my PC.

The concerned bank has correct VCCio (2.5V precisely), the FPGA doesn't exceed the consumption which my regulator can give, I don't see false contact. Everything seems perfect because other bank makes what the programm wants.

I have no more idea :confused:. PLEASE HELP

Thanks in advance

hinanotabu86