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Altera_Forum
Honored Contributor
15 years agoHi all
The problem still occurs on my prototype Here is today's diagnosis : - The track has a length of 2cm. And in comparision whit datasheet, it doesn't seem to be an impedance adaptation problem - I try on another prototype card, still unsuccesfull - I cut the track just in front of the concerned pin, the clock stay between 0.7V and 1.8V - The board is correctly routed, no false contact and all power (VccIO, VccInt, GND) have the good voltage - Someone suggest me that the concerned pin has an special function "VREFB3N0", but i don't think that's a problem - another tell me that another clock, which stay inside the FPGA, is a virtual clock, but on the dev board with the same programm it wasn't a problem finally my prototype still not working but why ? and how solve that ? Thanks for any suggestions to unblock my situation hinanotabu86