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Honored Contributorvht test bench examples
Hello, I am specifying altera to generate a .vht test bench for my vhdl project. I want to modify this test bench so that I can specify the input signals to be some value at different times ins...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Okay it simulates now and I can drag signals over to the wave window. --- Quote End --- Great. --- Quote Start --- However, I still have undefined for the clock even with your specified code for the clock in the test bench. --- Quote End --- Post your testbench (.vht file) and I'll look at it. Cheers, Dave
