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Altera_Forum's avatar
Altera_Forum
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15 years ago

vht test bench examples

Hello, I am specifying altera to generate a .vht test bench for my vhdl project. I want to modify this test bench so that I can specify the input signals to be some value at different times ins...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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When I follow your instructions I get the error, "#No Design Loaded!"

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What happened when you typed 'vsim test_bench' (change the name to whatever your testbench is named of course)?

That should load the design.

Cheers,

Dave