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Altera_Forum's avatar
Altera_Forum
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15 years ago

vht test bench examples

Hello, I am specifying altera to generate a .vht test bench for my vhdl project. I want to modify this test bench so that I can specify the input signals to be some value at different times ins...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

When I follow your instructions I get the error, "#No Design Loaded!"

I am creating the test bench (vht file) by in Quartus:

Processing -> Start -> start test bench writer

The first couple lines in the file that is generated is:

"-- ***************************************************************************

-- This file contains a Vhdl test bench template that is freely editable to

-- suit user's needs .Comments are provided in each section to help the user

-- fill out necessary details.

-- ***************************************************************************

-- Generated on "07/06/2011 10:00:43"

-- Vhdl Test Bench template for design :"